New posts in x86

Does the Intel Memory Model make SFENCE and LFENCE redundant?

assembly optimization x86 atomic memory-barriers

Assembly - JG/JNLE/JL/JNGE after CMP

assembly x86 eflags

Purpose of ESI & EDI registers?

Is ADD 1 really faster than INC ? x86 [duplicate]

performance optimization assembly x86

Why are signed and unsigned multiplication different instructions on x86(-64)?

assembly x86 x86-64 twos-complement

Size of store buffers on Intel hardware? What exactly is a store buffer?

performance assembly x86 intel cpu-architecture

How to display flags in Visual Studio Registers panel?

visual-studio assembly x86 visual-studio-debugging eflags

Is x86 CMPXCHG atomic, if so why does it need LOCK?

concurrency x86 atomic lock-free compare-and-swap

What is better "int 0x80" or "syscall" in 32-bit code on Linux?

linux assembly x86 system-calls 32-bit

Which variable size to use (db, dw, dd) with x86 assembly?

variables assembly x86

Atomicity on x86

c++ multithreading x86 atomic memory-barriers

What does it mean to align the stack?

c assembly gcc x86 memory-alignment

Is it possible to tell the branch predictor how likely it is to follow the branch?

c gcc x86 compiler-optimization micro-optimization

What is the purpose of XORing a register with itself? [duplicate]

What does `dword ptr` mean?

assembly x86 dword pointers

SQL Server Installation: Is it 32 or 64 bit?

sql-server-2005 64-bit x86

Bomb lab phase 5 - 6 char string, movzbl load, and $0xf, %ecx, and index an array with that?

assembly x86 reverse-engineering

SIMD signed with unsigned multiplication for 64-bit * 64-bit to 128-bit

c x86 integer bit-manipulation sse

How to check if a binary requires SSE4 or AVX on Linux

linux x86 assembly

What do the E and R prefixes stand for in the names of Intel 32-bit and 64-bit registers?

assembly x86 64-bit x86-64 cpu-registers