New posts in x86

How does a 32-bit machine support more than 4 GB of RAM?

memory x86 capacity

How does this milw0rm heap spraying exploit work?

javascript x86 exploit assembly

What is the function of the push / pop instructions used on registers in x86 assembly?

assembly x86 terminology stack-memory stack-pointer

In NASM labels next to each other in memory are printing both strings instead of first one

assembly x86 label nasm

Nasm segmentation fault on RET in _start

linux assembly x86 nasm

What will be used for data exchange between threads are executing on one Core with HT?

multithreading concurrency x86 x86-64 hyperthreading

Header files for x86 SIMD intrinsics

x86 header-files sse simd intrinsics

"No such file or directory" error when executing a binary

linux x86 elf dynamic-linking execve

Why is there not a register that contains the higher bytes of EAX?

assembly x86 cpu-registers

What C/C++ compiler can use push pop instructions for creating local variables, instead of just increasing esp once?

c++ assembly x86 compiler-optimization micro-optimization

clflush to invalidate cache line via C function

c performance x86 intrinsics cpu-cache

Slow jmp-instruction

assembly x86 intel cpu-architecture branch-prediction

Why is XCHG reg, reg a 3 micro-op instruction on modern Intel architectures?

performance assembly x86 intel

How to implement atoi using SIMD?

c++ x86 sse simd atoi

How to read the Intel Opcode notation

assembly x86 intel opcode machine-code

Calling 32bit Code from 64bit Process

.net migration x86 64-bit fortran

What is the meaning of "non temporal" memory accesses in x86

x86 sse assembly

How do you use gcc to generate assembly code in Intel syntax?

gcc x86 gnu intel assembly

Can I use Intel syntax of x86 assembly with GCC?

c gcc assembly x86 inline-assembly

Is it possible to run an x86 binary on an ARM processor?

linux compile x86 ventrilo arm