New posts in x86

Do any languages / compilers utilize the x86 ENTER instruction with a nonzero nesting level?

Fastest way to unpack 32 bits to a 32 byte SIMD vector

x86 simd avx bitmask avx2

LEA or ADD instruction?

What is the x86 "ret" instruction equivalent to?

assembly x86 return

Compile/run assembler in Linux?

linux ubuntu x86 assembly

Where is the Write-Combining Buffer located? x86

x86 intel cpu-architecture cpu-cache amd-processor

What are near, far and huge pointers?

c++ c pointers x86 x86-16

Specifying multiple files with LD_PRELOAD

c linux dynamic x86

x86 LOCK question on multi-core CPUs

assembly locking x86 cpu multicore

Can I force cache coherency on a multicore x86 CPU?

c++ multithreading x86 multicore cpu-cache

Why do we need to disambiguate when adding an immediate value to a value at a memory address

assembly x86 nasm

Do terms like direct/indirect addressing mode actual exists in the Intel x86 manuals

assembly x86 addressing-mode

gas: too many memory reference

assembly x86 gnu-assembler att

Sum reduction of unsigned bytes without overflow, using SSE2 on Intel

x86 sse simd sse2 sse3

what is the order of source operands in AT&T syntax compared to Intel syntax?

gcc assembly x86 att

Optimize for fast multiplication but slow addition: FMA and doubledouble

assembly x86 floating-point fma double-double-arithmetic

What does the MOVZBL instruction do in IA-32 AT&T syntax?

assembly x86 att zero-extension

Assembly difference between [var], and var

assembly x86 nasm

Why does a std::atomic store with sequential consistency use XCHG?

c++ assembly x86 lock-free stdatomic

When are x86 LFENCE, SFENCE and MFENCE instructions required?

multithreading assembly x86 cpu memory-fences