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New posts in x86
INC instruction vs ADD 1: Does it matter?
performance
assembly
x86
increment
micro-optimization
NASM Assembly convert input to integer?
assembly
x86
char
nasm
atoi
What Every Programmer Should Know About Memory?
optimization
memory
x86
cpu-architecture
cpu-cache
Enhanced REP MOVSB for memcpy
performance
assembly
x86
cpu-architecture
memcpy
Test whether a register is zero with CMP reg,0 vs OR reg,reg?
assembly
optimization
x86
micro-optimization
Why does mulss take only 3 cycles on Haswell, different from Agner's instruction tables? (Unrolling FP loops with multiple accumulators)
c
assembly
x86
sse
micro-optimization
Can x86's MOV really be "free"? Why can't I reproduce this at all?
c
assembly
x86
cpu-architecture
micro-optimization
How exactly do partial registers on Haswell/Skylake perform? Writing AL seems to have a false dependency on RAX, and AH is inconsistent
assembly
x86
intel
cpu-architecture
micro-optimization
Why should EDX be 0 before using the DIV instruction?
assembly
x86
integer-division
Why doesn't GCC use partial registers?
assembly
gcc
x86
x86-64
cpu-architecture
Assembling 32-bit binaries on a 64-bit system (GNU toolchain)
linux
assembly
build
x86
att
How to get the CPU cycle count in x86_64 from C++?
c++
c
performance
x86
rdtsc
When kernel stack's esp is stored to TSS for interrupt return iret?
linux-kernel
x86
operating-system
kernel
interrupt
Why does C++ code for testing the Collatz conjecture run faster than hand-written assembly?
c++
performance
assembly
optimization
x86
What's the purpose of the LEA instruction?
assembly
x86
x86-64
x86-16
Referencing the contents of a memory location. (x86 addressing modes)
assembly
x86
masm
addressing-mode
How do I print an integer in Assembly Level Programming without printf from the c library?
assembly
x86
integer
output
nasm
Micro fusion and addressing modes
assembly
x86
intel
cpu-architecture
iaca
Why is the loop instruction slow? Couldn't Intel have implemented it efficiently?
performance
assembly
x86
intel
cpu-architecture
Why do x86-64 instructions on 32-bit registers zero the upper part of the full 64-bit register?
assembly
x86
x86-64
cpu-registers
zero-extension
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