New posts in assembly

Why do ARM chips have an instruction with Javascript in the name (FJCVTZS)?

What is the meaning of "non temporal" memory accesses in x86

How to print a single-precision float with printf

How does MIPS I handle branching on the previous ALU instruction without stalling?

How do you use gcc to generate assembly code in Intel syntax?

Can I use Intel syntax of x86 assembly with GCC?

What is a Partial Flag Stall?

Why is there no "sub rsp" instruction in this function prologue and why are function parameters stored at negative rbp offsets?

Atomic double floating point or SSE/AVX vector load/store on x86_64

Vectorizing with unaligned buffers: using VMASKMOVPS: generating a mask from a misalignment count? Or not using that insn at all

Assembly, printing ascii number

What methods can be used to efficiently extend instruction length on modern x86?

Branch alignment for loops involving micro-coded instructions on Intel SnB-family CPUs

What does `rep ret` mean?

Stack allocation, padding, and alignment

The point of test %eax %eax [duplicate]

What is the "FS"/"GS" register intended for?

Why does GCC generate such radically different assembly for nearly the same C code?

What if there is no return statement in a CALLed block of code in assembly programs

When and why do we sign extend and use cdq with mul/div?