Is it the address bus size or the data bus size that determines "8-bit , 16-bit ,32-bit ,64-bit " systems?

Solution 1:

In a simple design, the size of the data bus is the size of the processor registers. This is generally true for the first generation of most designs, so the first 16-bit CPUs had 16-bit buses, 32-bit CPUs had 32-bit data buses, etc.

However, It is the size of the processor's integer registers that determine the OS type (64 vs 32) and not the data bus. The data bus can differ from the integer registers, but author of your quote associates the two together because it was often historically the same.

Some real world examples where the data bus and integer register widths differ:

• The original 8088 of the IBM PC is a 16-bit CPU design, but the data bus is 8-bits wide. To move 16-bits into a processor register from RAM required two access cycles

• The Original Pentium from 1992 has a 64-bit data bus but is a 32-bit design. The larger data bus allows the CPU to transfer more data in and out with caches but still only access 32-bits at a time internally with its CPU registers.

Generally the pointer size also follows the register size but the physical address bus width can be bigger or smaller than the register size. Some examples:

• Most 8-bit CPUs could address at least 64k of memory with a 16-bit address bus.
• The 8086 was 16-bit but had a 20-bit address bus to allow more addressable RAM.
• The original AMD Opteron is 64-bit but the physical address bus is 40-bits (internally) to simplify the design of the memory subsystem, since the a full 64-bits is too large to be utilized. Modern 64-bit AMD CPUs are 48-bits.

Modern designs also use much more complicated buses that don't cleanly fit into a bit-width paradigm. The Opteron example above is about how much the CPU can physically address according to software, there actually may or may not be any physical 48-bit addressing exposed by the CPU. CPUs are highly integrated and have specialized buses for peripherals, memory, and communication with other CPUs. There is no longer longer a singular "data bus" or "address bus". These buses may use differential signalling that doesn't deal with bit widths in any meaningful way, and even when they do, they are not strongly coupled to the CPU's architectural registers.

It's best to recognize that the bitness of a CPU is entirely architectural and mostly just from a software perspective. It doesn't have much to do with physical design anymore.

Solution 2:

There's no "pure" 32 or 64 bit system, and therefore the terms are just approximations anyway.

E.g. take your statement "Memory (RAM) is composed of bits, groups of 8 which form bytes, each of which can be addressed". That's not very common. PC's have their RAM on DIMM modules, and those are 64 bits wide. Back in the 90s, you had SIMMs, and those were 32 bits wide.

In some system DIMMs must or can be paired ("ganged"/"dual channel"), which would be a 128 bits databus. This concept predates the so-called "64 bits" processors from AMD and Intel.

Those groups of 64 bits from a single DIMM can indeed be subdivided in 8 bytes. That's doen pretty transparently by your CPU. It can also break the 64 bits in 4*16 bits, 2*32 bits, or just use all 64 bits as a single variable.

The most important question however is the width of an address. Every byte in memory has its own address, but not every bit. That means the 64 bits you get from a single DIMM have 8 addresses. The lowest of these is always a multiple of 8: Now, how many distinct addresses does the CPU support? There are two common answers, at least in theory. Some CPU's support 2³² different addresses, some support 2⁶⁴. This distinction is the most common distinction between 32 and 64 bit systems.

In practice, 64 bit systems today support less than 2⁶⁴ bytes of RAM. That would be unaffordable, and wouldn't fit in a normal PC anyway. That much memory would weight several million tons !

Solution 3:

It's the register size and memory handling within the processor.

Using tricks, one 16 bit processor had a 20 bit address bus, so it's not memory external of the processor.