Subdirectories and Makefiles

Solution 1:

The simplest way is to do:

CODE_DIR = code

.PHONY: project_code

project_code:
       $(MAKE) -C $(CODE_DIR)

The .PHONY rule means that project_code is not a file that needs to be built, and the -C flag indicates a change in directory (equivalent to running cd code before calling make). You can use the same approach for calling other targets in the code Makefile.

For example:

clean:
       $(MAKE) -C $(CODE_DIR) clean

Solution 2:

Try putting this rule in project/Makefile something like this (for GNU make):

.PHONY: project_code
project_code:
       cd code && make