Can GNU make handle filenames with spaces?

The bug #712 suggests that make does not handle names with spaces. Nowhere, never.

I found a blog post saying it's partially implemented by escaping the spaces with \ (\\ seems to be typo or formatting artefact), but:

• It does not work in any functions except $(wildcard).
• It does not work when expanding lists of names from variables, which includes the special variables $?, $^ and $+ as well as any user-defined variable. Which in turn means that while $(wildcard) will match correct files, you won't be able to interpret the result anyway.

So with explicit or very simple pattern rules you can get it to work, but beyond that you are out of luck. You'll have to look for some other build system that does support spaces. I am not sure whether jam/bjam does, scons, waf, ant, nant and msbuild all should work.

GNU Make does very poorly with space-separated filenames.

Spaces are used as delimiters in word list all over the place.

This blog post summarizes the situation well, but WARNING: it incorrectly uses \\ rather than \

target: some\ file some\ other\ file

some\ file some\ other\ file:
    echo done

You can also use variables, so this would also work

VAR := some\ file some\ other\ file

target: $(VAR)

$(VAR):
    echo done

Only the wildcard function recognizes the escaping, so you can't do anything fancy without lots of pain.

But don't forget that your shell uses spaces as delimiters too.

If I wanted to change the echo done to touch $@, I'd have to add slash to escape it for my shell.

VAR := some\ file

target: $(VAR)

$(VAR):
    touch $(subst \,\\,$@)

or, more likely, use quotes

VAR := some\ file some\ other\ file

target: $(VAR)

$(VAR):
    touch '$@'

In the end, if you want to avoid a lot of pain, both in GNU make, and in your shell, don't put spaces in your filenames. If you do, hopefully the limited capabilities of Make will be sufficient.

This method will also allow use of listed file names such as $? and user variables that are lists of files.

The best way to deal with spaces in Make is to substitute spaces for other characters.

s+ = $(subst \ ,+,$1)

+s = $(subst +,\ ,$1)

$(call s+,foo bar): $(call s+,bar baz) $(call s+,bar\ baz2)
    # Will also shows list of dependencies with spaces.  
    @echo Making $(call +s,$@) from $(call +s,$?)

$(call s+,bar\ baz):

    @echo Making $(call +s,$@)

$(call s+,bar\ baz2):

    @echo Making $(call +s,$@)

Outputs

Making bar baz
Making bar baz2
Making foo bar from bar baz bar baz2

You can then safely manipulate lists of file names using all the GNU Make functions. Just be sure to remove the +'s before using these names in a rule.

SRCS := a\ b.c c\ d.c e\ f.c

SRCS := $(call s+,$(SRCS))

# Can manipulate list with substituted spaces
OBJS := $(SRCS:.c=.o)

# Rule that has object files as dependencies.
exampleRule:$(call +s,$(OBJS))
    # You can now use the list of OBJS (spaces are converted back).
    @echo Object files: $(call +s,$(OBJS))

a\ b.o:
    # a b.o rule commands go here...
    @echo in rule: a b.o

c\ d.o:

e\ f.o:

Outputs

in rule: a b.o
Object files: a b.o c d.o e f.o

This info is all from the blog that everyone else was posting.

Most people seem to be recommending using no spaces in paths or using Windows 8.3 paths, but if you must use spaces, escaping spaces and substitution works.