Cycle counter on ARM Cortex M4 (or M3)?

I'm trying to profile a C function (which is called from an interrupt, but I can extract it and profile it elsewhere) on a Cortex M4.

What are the possibilities to count the number of cycles typically used in this function ? Function shall run in ~4000 cycles top, so RTC isn't an option I guess, and manually counting cycles from disassembly can be painful - and only useful if averaged because I'd like to profile on a typical stream with typical flash / memory usage pattern.

I have heard about cycle counter registers and MRC instructions, but they seem to be available for A8/11. I haven't seen such instructions in cortex-Mx micros.

Take a look at the DWT_CYCCNT register defined here. Note that this register is implementation-dependent. Who is the chip vendor? I know the STM32 implementation offers this set of registers.

This post provides instructions for using the DWT Cycle Counter Register for timing. (See the post form 11 December 2009 - 06:29 PM)

This Stack overflow post is an example on how to DWT_CYCCNT as well.

If your part incorporates the CoreSight Embedded Trace Macrocell and you have appropriate trace capable debugger hardware and software then you can profile the code directly. Trace capable debug hardware is of course more expensive, and your board needs to be designed to make the trace port pins available on the debug header. Since these pins are often multiplexed to other functions, that may not always be possible or practical.

Otherwise if your tool-chain includes a cycle-accurate simulator (such as that available in Keil uVision), you can use that to analyse the code timing. The simulator provides debug, trace and profiling features that are generally more powerful and flexible that those available on chip, so even if you do have trace hardware, the simulator may still be the easier solution.